1. Technical Field
The present inventive concept relates to a method for fabricating a semiconductor device.
2. Description of the Prior Art
As semiconductor devices have decreased in size yet increased in performance, the dimensions of via-holes during wiring have decreased. However, as the dimensions of via-holes are decreased, the density difference between isolation via-holes and dense via-holes may become large due to a proximity effect. Further, if the number of isolation vias is increased, process margin problems may occur.
If the inclusion of dummy vias are used to reduce the density difference, parasitic capacitance may be increased.